With regard to an information processing apparatus such as a computer and a portable terminal or an image or audio processing apparatus such as a digital camera and a television system, it is conventionally desired to complete the startup of the apparatus as rapidly as possible after a user turns on the apparatus. One mode that rapidly starts up an apparatus is a hibernate boot mode. The hibernate boot mode is a technique of restoring the previous operating state retained in memory etc., for rapid startup without executing a normal activation sequence. A user interface (UI) preceding activation mode also exists. The UI preceding activation mode is a technique of displaying a dummy screen to a user at an earlier stage of the activation of the apparatus so that the apparatus seems to be rapidly activated.
On the other hand, a multiprocessor system having multiple processors and a multicore system having multiple processor cores (hereinafter collectively referred to as a multicore system) exist. The multicore system has a scheduling mode in which multiple processes are respectively allocated to multiple schedulers in advance to sequentially execute the processes at the selected schedulers according to the allocation. The multiprocessor system has a mode in which multiple schedulers having different algorithms is prepared to perform scheduling with a scheduler having an appropriate algorithm for each task. The multiprocessor system also has a mode in which a processor having a master scheduler and a processor having a slave scheduler are included such that the master scheduler controls the execution of a process by the slave scheduler.
For examples of the technology above, refer to Japanese Laid-Open Patent Publication Nos. 2001-117786, H4-60843, and H11-265297.
However, the hibernate boot mode has a problem in that a storage area is necessary for storing the operating state of an apparatus. In the UI preceding activation mode, the activation of the apparatus is not actually rapidly completed. If processes are preliminarily allocated to respective schedulers, the processes cannot be flexibly allocated to the schedulers. Therefore, this is not suitable for a system, such as a mobile telephone, that allows a user to update the system and to add a new function while in use, for example. If multiple schedulers operate, it is problematic that the schedulers must be synchronized so as not to create a conflict of established memory or interrupt numbers. If multiple schedulers having different algorithms are operated and compete based on speed of scheduling, a processor that is operated by a scheduler that is not employed ends up performing unnecessary computation. This is problematic in terms of power consumption. Even when multiple schedulers having different algorithms are prepared, if load is concentrated on a scheduler having any algorithm, a process is delayed in the processor operating the scheduler.